Aat the Department of information technology
Tasks: In this work, adaptive memory systems and in particular on-chip memory
hierarchies, will be designed and evaluated in the context of multicore
processors. The memory system will adapt, i.e., dynamically reconfigure, in
response to the behavior of a multithreaded or multiprogram workload. The goal
of this dynamic reconfiguration is to optimize power-efficiency, the balance
between performance and power consumption.
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